1. Field of the Invention
The invention relates in general to a method of removing a silicon-on-glass residue, and more particularly, to a method of preventing the contact window from being poisoned by the residue of silicon-on-glass.
2. Description of the Related Art
Contacts have been widely applied as the multi-level interconnects between integrated circuits or semiconductor devices. In a conventional method for forming a contact, a inter-metal dielectric layer (IMD) is formed on a first wiring layer. The inter-metal dielectric layer has an opening therewithin to expose a part of the first wiring layer. A conductive layer is formed to fill the opening as a contact plug as for the interconnection between the first wiring layer and a second wiring layer formed thereafter.
Typically, the inter-metal dielectric layer comprises layers of spin-on-glass layers. Spin-on-glass is a common planarization technique to form a relative flat layer. The process comprises dissolving dielectric material into a solvent, and using spin-coating technique to cover the material on a wafer. Since the dielectric material is circulated on the wafer with the solvent, the uneven recessed surface of the wafer are easily filled with the dielectric to obtain a planarized surface. After thermal treatment, the solvent is removed to cure the dielectric material as a spin-on-glass layer. A local planarization is thus achieved. Therefore, the technique of spin-on-glass is advantageous to gap filling for preventing the formation of a void while depositing a dielectric layer.
The sandwich type spin-on-glass layer is widely applied in semiconductor process. FIG. 1A to FIG. 1F are cross sectional views showing a conventional method for forming the interconnect with a sandwich type spin-on-glass layer as an inter-metal dielectric layer. In FIG. 1A, a semiconductor substrate 100 comprising a metal-oxide semiconductor (MOS) which further comprises a gate 105 and a source/drain region 108 and an isolation structure 102 is provided. A dielectric layer 122 with an opening 124 exposing the source/drain 108 is formed to cover the whole substrate 100. The opening 124 is filled with a part of a first wiring layer 126 which comprises metal layers 126a, 126b, 126c and 126d. As shown in the figure, according to the topography of the substrate, the first wiring layer 126 has an uneven surface level. In addition, the metal layers 126a, 126b, 126c and 126d of the first wiring layer 126 are different in surface area.
In FIG. 1B, a dielectric layer 128 is formed on the dielectric layer 122 and the first wiring layer 126. The dielectric layer 128 has uneven surface level due to the topography of the first wiring layer 126. That is, according to the topography of the first wiring layer 126, some gaps or recesses are formed. On the dielectric layer 128, a spin-on-glass layer 132 is formed for gap filling.
In FIG. 1C, the spin-on-glass layer 132 is etched back until the dielectric layer 128 is exposed. The remaining spin-on-glass layer 132a is expected to fill the gaps 130 only. However, it is very likely that a part of the spin-on-glass 132a also remains on the more planar surface of the dielectric layer 128, that is, on the portion of dielectric layer 128 which has a larger surface area on the metal layer 126d.
In FIG. 1D, a dielectric layer 134 is further formed to cover the dielectric layer 128 and the remaining spin-on-glass layer 132a. The dielectric layer 128, the spin-on-glass layer 132a, and the dielectric layer 134 compose a sandwich type spin-on-glass layer.
In FIG. 1E, to achieve the interconnection between the first wiring layer 126 and the second wiring layer formed thereafter, the sandwich type layer is patterned to form openings 136, 138, 140a, 140b, and 140c which expose parts of the underlying first wiring layer 126 by photolithography and etching process. As shown in the figure, a part of the remaining spin-on glass layer 132a is exposed on the side walls of the openings 140a, 140b, and 140c which expose the metal layer 126d. As mentioned above, the spin-on-glass layer 132a is formed from curing the solution containing dielectric material. Therefore, it is very often that the solvent is not removed completely during curing process. Or during the photolithography and etching process for patterning the openings 140a, 140b, and 140c, the remaining spin-on-glass layer 132a is very easy to absorb moisture. For either the remaining spin-on-glass layer 132a to containing solvent or moisture, the contained solvent or moisture evaporates, namely, the spin-on-glass layer 132a outgases, in a higher temperature.
In FIG. 1F, a metal layer 142 is formed to fill the openings 136, 138, 140a, 140b, and 140c to form contact plugs. The temperature for forming the metal layer 142 is typically so high to cause the solvent or moisture contained in the spin-on-glass layer 132a to evaporate, that is, the spin-on-glass layer 132a to outgas. The metal layer 142 is thus filled with gas void 144 evaporated from the solvent or the moisture absorbed by the spin-on-glass layer 132a. The metal layer 142 is thus poisoned. Since the metal layer 142 is formed to electrically connect the first wiring layer 126 and a second wiring layer formed thereafter, with the formation of the gas voids 144, a poor conductivity is obtained. Therefore, the quality of the device is degraded.
On the other hand, the remaining spin-on-glass layer 132a on the metal layer 126d causes the aspect ratio of forming a contact plug to increase. The higher the aspect ratio is, the poorer the step coverage is while depositing the metal layer 142. As a result, an air void 146 as shown in the figure is formed.